Euclyd, a chip startup based at Eindhoven's High Tech Campus, closed a Series A of more than €200 million (about $231 million) on September 15, co-led by Samsung, Somerset Capital Partners, EQT's Scaleup Europe Fund, and Innovation Industries, with EIFO, imec.xpand, the Brabant Development Agency, and Quadri also participating. The company has shipped no chips yet. What it has is a bet that GPUs -- the chip architecture running nearly all AI inference today -- are the wrong tool for the job, and a board chairman who spent eleven years running the company that makes the machines those GPUs are printed on.
That chairman is Peter Wennink, who led ASML as president and CEO from 2013 to 2024 -- the company whose extreme-ultraviolet lithography machines are the reason any leading-edge AI chip can be manufactured at all. Euclyd, founded by Bernardo Kastrup and Atul Sinha, is betting on a different layer of the stack: rather than a general-purpose GPU with memory bolted alongside it, Euclyd's Craftwerk platform pairs programmable ASIC compute with what it calls processor-memory co-design, built specifically for AI inference rather than training. "AI's potential will remain constrained unless we fundamentally change the infrastructure beneath it," CEO Kastrup said in the announcement.
Wennink's résumé is the reason his name is doing real work in this announcement rather than sitting as a courtesy title. Over his eleven years running ASML, the company's market value grew from roughly €27 billion to €333 billion, and he leaves it as the world's sole supplier of the EUV lithography systems that print every leading-edge AI chip on the market -- a monopoly built, not inherited. A startup chip architecture is a bet on an unproven idea; a chairman who spent over a decade making a genuine monopoly out of a hard manufacturing problem is, at minimum, someone who has seen what that process looks like from the inside.
What the raise confirms, and what's still Euclyd's own word
- $231M · Series A, closed Sept. 15, 2026
- Co-led by Samsung, Somerset Capital Partners, EQT's Scaleup Europe Fund, and Innovation Industries
Includes: Engineering headcount, silicon and systems development, and commercial-deployment prep, per the company
Excludes: A stated valuation -- none disclosed by Euclyd or any participating investor - 100x · Euclyd's own claim
- Claimed power-efficiency and cost-per-token advantage over "leading alternatives," modeled against Meta's Llama 4 Maverick
Includes: Internal modeling the company has published as a headline claim
Excludes: Any third-party benchmark, measurement, or independent replication
Each individual Craftwerk chip packs 16,384 custom processors into a single palm-sized system-in-package, rated at 8 PFLOPS in FP16 and 32 PFLOPS in the lower-precision FP4 format increasingly used for inference, paired with a terabyte of what Euclyd calls ultra-bandwidth memory. The flagship product, Craftwerk Station CWS 32, racks 32 of those chips together for a claimed 1.024 exaflops of FP4 compute and 32 terabytes of memory total, drawing roughly 125 kilowatts -- a throughput Euclyd puts at 7.68 million tokens per second. None of those figures have been independently verified, and the company's own reporting acknowledges as much: "the company hasn't yet validated these numbers at commercial scale, since first silicon hasn't shipped yet." Euclyd says it's in discussions with four prospective customers, aiming to deliver to two of them in 2027 and two more in 2028, with full production targeted for the same year.
The rationale Euclyd gives for building a new chip rather than a better GPU is specific to inference, not training. A GPU's compute cores sit physically separate from its memory, so every token generated means shuttling data back and forth across that gap -- the "memory wall" that increasingly determines how much a query actually costs once a model is deployed at scale, rather than how it was trained. Processor-memory co-design is Euclyd's answer: put the memory next to the compute instead of beside it, so less power goes to moving data and more goes to using it. It's the same problem Cornelis Networks is attacking from the network side with Active Compute Fabric, and Euclyd is not the only European entrant betting the fix lives in the chip itself -- it's simply the best-funded one so far.
Samsung's presence as co-lead is worth reading past the headline figure, too. Samsung is not a typical venture investor in an unproven chip architecture -- it is one of the world's largest memory makers, already locked into a $200 billion manufacturing deal with Broadcom and a separate $750 billion supply pact with SK Hynix elsewhere in the AI buildout. A startup whose entire pitch is putting memory closer to compute is, from Samsung's seat, either a future customer for its memory business or a hedge against being disintermediated by whoever solves that problem first. Neither Samsung nor Euclyd has described the relationship in those terms publicly, but the strategic logic doesn't require a stated motive to be legible.
Euclyd is one of several Dutch and European entrants chasing the same gap this year -- Axelera AI raised $250 million and Fortaegis raised $50 million in separate rounds -- betting collectively that Europe can field a domestic alternative to Nvidia on the inference side even as it remains dependent on ASML for the lithography tools that make any of these chips manufacturable in the first place. For now, Euclyd's raise is the largest of that group, and by a wide margin.
- Euclyd raised over €200 million ($231M) in a Series A co-led by Samsung, closed September 15.
- Former ASML CEO Peter Wennink joined as board chairman.
- Craftwerk Station CWS 32 targets 1.024 exaflops of FP4 compute and 32TB of memory across 32 chips.
- Euclyd claims 100x better power efficiency than GPUs, based on its own modeling, not measurement.
- Caveat: first silicon isn't due until 2028, and no independent benchmark yet supports the efficiency claim.